Teledyne-lecroy QPHY-DDR3 Uživatelský manuál stáhnout pdf (Strana 41)

QPHY-DDR3 Software Option

917717 Rev C 41

Write Bursts

tDQSS, DQS latching rising transitions to associated CK edge

CK rising edge at VREF level to DQS rising edge at VREF level, see Figure 21.

Figure 19. Burst write operation [JESD79-3D figure 43]

tDQSH, DQS Input High Pulse Width

DQS High pulse width at VREF level, see Figure 22.

Figure 20. Data input (write) timing [JESD79-3D figure 43]

tDQSL, DQS Input Low Pulse Width

DQS Low pulse width at VREF level, see Figure 22.

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Teledyne-lecroy QPHY-DDR3 Uživatelský manuál Strana 41